A FET can be represented like a 3 port circuit or like 3 different 2 port circuits:
The well known representations for the FET 2 port circuits are those represented in the following table

Equivalent Circuit 
[Y] Matrix 
Common Source 


Common Drain



Common Gate



If we consider the FET like a 3 port network we have:
It can be seen that there are some relations between 2port representations and 3 port representations:
So we can write the [Y] matrix of the FET as a 3port network by considering that the sum of the columns and the rows of the FET matrix must be 0 (see Kirchhoff's laws):
Finally we obtain:
Some times is useful to consider the FET like a simply current generator controlled by $ V_{GS}$ in the following we present the simplified [Y] matrix:
and in the following we present the simplified [S] matrix:
